电气类毕业设计英文资料翻译--集成电路-管理系统(编辑修改稿)

电气类毕业设计英文资料翻译--集成电路-管理系统(编辑修改稿)内容摘要：

ach layer. Because each feature is so small, electron microscopes are essential tools for a process engineer who might be debugging a fabrication process. The earliest integrated circuits were packaged in ceramic flat packs, which continued to be used by the military for their reliability and small size for many years. Commercial circuit packaging quickly moved to the dual inline package (DIP), first in ceramic and later in plastic. In the 1980s pin counts of VLSI circuits exceeded the practical limit for DIP packaging, leading to pin grid array (PGA) and leadless chip carrier (LCC) packages. Surface mount packaging appeared in the early 1980s and became popular in the late 1980s, using finer lead pitch with leads formed as either gullwing or Jlead, as exemplified by smalloutline integrated circuit a carrier which occupies an area about 30 – 50% less than an equivalent DIP, with a typical thickness that is 70% less. This package has gull wing leads protruding from the two long sides and a lead spacing of inches. 第 页 共 页 In the late 1990s, PQFP and TSOP packages became the most mon for high pin count devices, though PGA packages are still often used for highend microprocessors. Intel and AMD are currently transitioning from PGA packages on highend microprocessors to land grid array (LGA) packages. Ball grid array (BGA) packages have existed since the 1970s. Flipchip Ball Grid Array packages, which allow for much higher pin count than other package types, were developed in the 1990s. Most integrated circuits large enough to include identifying information include four mon sections: the manufacturer39。 s name or logo, the part number, a part production batch number and/or serial number, and a fourdigit code that identifies when the chip was manufactured. Extremely small surface mount technology parts often bear only a number used in a manufacturer39。 s lookup table to find the chip characteristics. The manufacturing date is monly represented as a twodigit year followed by a twodigit week code, such that a part bearing the code 8341 was manufactured in week 41 of 1983, or approximately in October 1983. Structure and function of the MCS51 series Structure and function of the MCS51 series onechip puter is a name of a piece of onechip puter series which Intel Company produces. This pany introduced 8 topgrade onechip puters of MCS51 series in 1980 after introducing 8 onechip puters of MCS48 series in 1976. It belong to a lot of kinds this line of onechip puter the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic position, basic performance and instruction system are all the same. 8051 daily representatives 51 serial onechip puters . An onechip puter system is made up of several following parts: ( 1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some onechip puters, such as 8031 , 8032, 80C ,etc.. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the puter. ( 6) Five cut off cutting。