外文翻译--利用ti的msp430系列的嵌入式系统设计(节选)(编辑修改稿)

外文翻译--利用ti的msp430系列的嵌入式系统设计(节选)(编辑修改稿)内容摘要：

eared by software, or automatically. Interrupts automatically reset this bit, and the reti instruction automatically sets it. 1=Interrupts Enabled 0=Interrupts Disabled • The CPU off bit (CPUOff) Location: SR(4) Function: Enables or disables the CPU core. Can be cleared by software, and is reset by enabled interrupts. None of the memory, peripherals, or clocks are affected by this bit. This bit is used as a power saving feature. 1=CPU is on 0=CPU is off • The Oscillator off bit (OSCOff) Location: SR(5) Function: Enables or disables the crystal oscillator circuit (LFXT1). Can be cleared by software, and is reset by enabled external interrupts. OSCOff shuts down everything, including peripherals. RAM and register contents are preserved. This bit is used as a power saving feature. 1=LFXT1 is on 0=LFXT1 is off • The System Clock Generator (SCG1,SCG0) Location: SR(7),SR(6) Function: These bits, along with OSCOff and CPUOff define the power mode of the device. • The Overflow Flag (V) Location: SR(8) Function: I dentifies when an operation results in an overflow. Can be set or cleared by software, or automatically. Overflow occurs when two positive numbers are added together, and the result is negative, or when two negative numbers are added together, and the result is positive. 1=Overflow result occurred 0=No overflow result occurred Four of these flags (Overflow, Negative, Carry, and Zero) drive program control, via instructions such as cmp (pare) and jz (jump if Zero flag is set). You will see these flags referred to often in this book, as their function represents a fundamental building block. The instruction set is detailed in Chapter 9, and each base instruction description there details the interaction between flags and instructions. As a programmer, you need to understand this interaction. Stack Pointer The Stack Pointer is implemented in R1. Like the Program Counter, the LSB is fixed as a zero value, so the value is always even. The stack is implemented in RAM, and it is mon practice to start the SP at the top (highest valid value) of RAM. The push mand moves the SP down one word in RAM (SP=SP2), and puts the value to be pushed at the new SP. Pop does the reverse. Call statements and interrupts push the PC, and ret and reti statements pop the value from the TOS (top of stack) back into the PC. I have one simple rule of thumb for the SP: leave it alone. Set the stack pointer as part of your initialization, and don39。 t fiddle with it manually after that. As long as you are wary of two stack conditions, the stack pointer manages itself. These two conditions are: Asymmetric push/pop binations. Every push should have a pop. If you push a bunch of variables, and fail to pop them back out, it will e back to haunt you. If you pop an empty stack, the SP moves out of RAM, and the program will fail. Stack encroachment. Remember, the stack is implemented in RAM. If your program has multiple interrupts, subroutine calls, or manual pushes, the stack will take up more RAM, potentially overwriting values your code needs elsewhere. Memory Structure Special Function Registers Special function registers are, as you might have guessed, memorymapped registers with special dedicated functions. There are, nominally, sixteen of these registers, at memory locations 0000h through 000Fh. However, only the first six are used. Locations 0000h and 0001h contain interrupt enables, and locations 0002h and 0003h contain interrupt flags. These are described in Chapter 3. Locations 0004h and 0005h contain module enable flags. Currently, only two bits are implemented in each byte. These bits are used for the USARTs. Peripheral Registers All onchip peripheral registers are mapped into memory, immediately after the special function registers. There are two types of peripheral registers: byteaddressable, which are mapped in the space from 010h to 0FFh, and wordaddressable, which are mapped from 0100h to 01FFh. RAM RAM always begins at location 0200h, and is contiguous up to its final address. RAM is used for all scratchpad variables, global variables, and the stack. Some rules of thumb for RAM usage: The developer needs to be careful that scratchpad allocation and stack usage do not encroach on each other, or on global variables. Accidental sharing of RAM is a very mon bug, and can be difficult to chase down. You need to clearly understand how large your stack will bee. Be consistent about use. Locate the stack at the very end of the RAM space, and place your most monly used globals at the beginning. Never allocate more scratchpad than you need, and always deallocate as quickly as is reasonable. You can never have too much free RAM. Boot Memory (flash devices only) Boot memory is implemented in flash devices only, located in memory locations 0C00h through 0FFFh. It is the only hardcoded ROM space in the flash devices. This memory contains the bootstrap loader, which is used for programming of flash blocks, via a USART module. Information Memory (flash devices only) Flash devices in the 39。 430 family have the added feature of information memory. This information memory acts as onboard EEPROM, allowing critical variables to be preserved through power down. It is divided into two 128byte segments. The first of these segments is located at addresses 01000h through 0107Fh, and the second。