外文翻译--三位半lcdled显示ad转换器(编辑修改稿)

外文翻译--三位半lcdled显示ad转换器(编辑修改稿)内容摘要：

ipation count such as 1111(8 segments on) can suffer by a count or more. Devices with a positive TC reference may require several counts to pull out of an overrange condition. This is because overrange is a low dissipation mode, with the three least significant digits blanked. Similarly, units with a negative TC may cycle between overrange and a nonoverrange count as the die alternately heats and cools. All these problems are of course eliminated if an external reference is used. The ICL7106, with its negligible dissipation, suffers from none of these problems. In either case, an external reference can easily be added, as shown in Figure 2. Analog COMMON is also used as the input low return during autozero and deintegrate. If IN LO is different from analog COMMON, a mon mode voltage exists in the system and is taken care of by the excellent CMRR of the converter. However, in some applications IN LO will be set at a fixed known voltage (power supply mon for instance). In this 第 5 页 共 16 页 application, analog COMMON should be tied to the same point, thus removing the mon mode voltage from the converter. The same holds true for the reference voltage. If reference can be conveniently tied to analog COMMON, it should be since this removes the mon mode voltage from the reference system. Within the lC, analog COMMON is tied to an NChannel FET that can sink approximately 30mA of current to hold the voltage below the positive supply (when a load is trying to pull the mon line positive). However, there is only 10μA of source current, so COMMON may easily be tied to a more negative voltage thus overriding the internal reference. FIGURE 2 USING AN EXTERNAL REFERENCE TEST The TEST pin serves two functions. On the ICL7106 it is coupled to the internally generated digital supply through a 500Ω resistor. Thus it can be used as the negative supply for externally generated segment drivers such as decimal points or any other presentation the user may want to include on the LCD display. Figures 3 and 4 show such an application. No more than a 1mA load should be applied. The second function is a “lamp test”. When TEST is pulled high (to V+) all segments will be turned on and the display should read “1888”. The TEST pin will sink about 15mA under these conditions. 第 6 页 共 16 页 FIGURE 3 SIMPLE INVERTER FOR FIXED DECIMAL POINT FIGURE 4 EXCLUSIVE „OR‟ GATE FOR DECIMAL POINT DRIVE Digital Section Figures 5 and 6 show the digital section for the ICL7106 and ICL7107, respectively. In the ICL7106, an internal digital ground is generated from a 6V Zener diode and a large PChannel source follower. This supply is made stiff to absorb the relative large capacitive currents when the back plane (BP) voltage is switched. The BP frequency is the clock frequency divided by 800. For three readings/sec., this is a 60Hz square wave with a nominal amplitude of 5V. The segments are driven at the same frequency and amplitude and are in phase with BP when OFF, but out of phase when ON. In all cases negligible DC voltage exists across the segments. Figure 6 is the Digital Section of the ICL7107. It is identical to the ICL7106 except that the regulate。