外文文献及翻译-使用基于重构计算机平台的fpga分析高性能功率谱(编辑修改稿)

外文文献及翻译-使用基于重构计算机平台的fpga分析高性能功率谱(编辑修改稿)内容摘要：

analysis. Although this works as an addon card for a workstation, it is extremely powerful, flexible and relatively cost effective. The power spectrum analysis uses modules developed by us for multi channel data acquisition and several signal processing oper ations performed simultaneously on four data channels. The FPGA based solution allows for the realtime ac quisition and processing of samples of the ining signal. After the data acquisition and analysis, the data is passed to the host, based on the selected options. Our card sustains simultaneous data streams on each of the four channels for plex algorithms. We begin this paper by briefly discussing the mechanics behind the power spectrum analysis. Section 3 outlines Re configurable Computing and the card used for this work. In Section 4 and 5, we discuss the scheme used for our imple mentation of power spectrum analysis on the FPGA based reconfigurable hardware and the experimental setup respec tively. Finally, we summarize this paper and indicate some directions for future improvements. 2. Power Spectrum Analysis It is very difficult to detect noise or interference if present in the input signal by merely observing the time domain samples. However, by mapping the signals [8] in frequency domain, the analysis and detection of such signals bees easy. The signal processing technique, in particular the FFT plays an important role. In 1965, it was practically used by . Cooley and . Tukey of Bell Labs to filter the noisy signals. This divide and conquer technique for a set of N elements reduces the number of plex multiplications to an order of N * log2 N from N 2 otherwise required by the Discrete Fourier Transform (DFT). The power spectrum analysis uses FFT to represent the magnitude of various frequency ponents of a signal. By observing the spectrum, one can find how much energy or power is contained in the different frequency ponents of the signal. Analysis of the power spectrum allows isolating noise and provides information related to its source. 3. Reconfigurable Computing (RC) RC [7] explores the HW/SW solutions where the un derlying hardware is flexible and is modified at runtime under software control to accelerate an application. Pre dominantly, RC uses FPGA, a VLSI chip whose hardware functionality is userprogrammable. Putting FPGAs on a PC addon card or motherboard allows FPGAs to serve as puteintensive coprocessors. It is realized that consid erable acceleration may be achieved by targeting algorithms in these applicationspecific, dynamically programmable flexible parts. Reconfigurable Computing the paradigm to accelerate applications using programmable hardware has 9 sufficiently matured. Now, HPC munity is looking towards this technology to further enhance the power of clusters for su perputing needs. The following subsections summarizes the Reconfigurable hardware and the system software used in this experimentation. Figure 1. RC card block diagram card It is a FPGA based card [4] that can be plugged to a host puter via the 64bit, 66 MHz PCI bus. This card has two Xilinx FPGAs [3]. Out of these, the larger device, XCV800 is used as a pute engine implementing the application logic. The other FPGA is a XCV300 device that holds the PCI controller and logic to control other devices. When plugged into a PCI slot, the RC card can be assumed to work as a coprocessor to the host. Figure 1 shows the RC card block diagram. There is an onboard 128MB of SDRAM and 1MB of ZBT RAM. The SDRAM is useful for storing input, intermediate and final results. The ZBT is suitable for applications where caching is required. The card supports DMA operations. Input and output data to the card may be supplied from the host using the PCI interface or it can directly e to the card using the LVDS interface [1]. LVDS allows a high speed data transfer in excess of 1 Gbps. The system software interface for the RC card is imple mented over Red Hat Linux operating system. It provides all the basic functionalities in terms of the data transfer and card control irrespective of the intended application. The device driver performs resource management and services to allocate/free DMA buffers. The system software also provides basic services to configure, setup/free resources, send input data, receive output data, initiate putation etc. 4. Power Spectrum Analyzer on RC The power spectrum analyzer application has mainly two ponents: the one running on the host system and the other running on the RC card attached to the host. The host controls the initial setup of the application. The raw input data is preprocessed by the RC card, and power, averagepower and peakpower values determined. The host performs postproc。