ahighprecisiontemperaturecontrolsystemforcmosintegratedwiderangeresistivegassensors-外文文献(编辑修改稿)

ahighprecisiontemperaturecontrolsystemforcmosintegratedwiderangeresistivegassensors-外文文献(编辑修改稿)内容摘要：

uting the inverterswitch with an inverting attenuator。 secondly (see Fig. 5(b)),by substituting the inverter switch with a non inverting attenuator and inverting amplifiers with non inverting ones. Forboth these configurations, we have implemented a discreteelement board using mercial devices and, then, each single block has been designed at transistor level in a standardCMOS technology.For what concerns nonidealities of ponents in Rsensestimation, previous considerations are always valid. Theonly difference is related to the value of the ideal oscillationperiod. In fact, the first solution maintains the same relationship ResistancePeriod expressed in Eq. (3), while thesecond one has to be modified as follows:T = 4(A − 1)RsensC (16)The measured Rsenspercent error on the test boards, usingmercial resistors acting as sensor, is very low for boththis solution as shown in Figs. 6 and 7. Measurement resultsand schematic and post layout analyses have shown also avery low error in oscillation period with respect to theoretical one for all the 6 decades considered (10 KOmega1–10 GOmega1).Sensitivity has been set to 10 ms/MOmega1 for the first solutionand 100 ms/MOmega1 for the second one.. Transistor level implementationAs stated before, amplifiers and buffers blocks, shown inFig. 5(a) and (b), have been internally designed at transistorlevel in a standard CMOS technology (AMS 181。 m). Theyare all based on the CMOS OTA structure presented in asimplified version shown in Fig. 8. The circuit has beendesigned for low voltage ( 177。 V) low power (100 181。 W)applications.The proposed amplifier, having a 83 dB open loop gainanda55MHzGBW (see Fig. 9), has shown good performance concerning stability in temperature between 10 and80◦C and power supply variations between the 177。 5% of thenominal value. As stated before, the Rsensmeasure is heavilyinfluenced by the Slew Rate and the offset of buffers and integrator respectively. Simulation results have shown a SlewRate value of 140 V/181。 s and typical offset value of 150 181。 V.In Fig. 10 the chip photo containing the two R/T interfacesis reported, while in Fig. 11(a) and 11(b) their layout implementations are shown. In Tables 1 and 2 novel experimentalresults, extrapolated by substituting the Rsenswith mercial resistors, are reported. The value of the measured oscillation period is in a good agreement with theoretical one forboth the implemented solutions.4. The heater circuitThe temperature control system is driven by a constant powersupply, which generates a constant power signal, that we cancontrol through an external voltage. A constant current heaterTable 1 Measured percent error vs. Rsensfor the first convertertopologyRsensValue PeriodNominal Measured Theoretical Measured Error (%)10 KOmega1 10 KOmega1 ms ms − %56 KOmega1 KOmega1 ms ms − %100 KOmega1 100 KOmega1 ms ms − %270 KOmega1 270 KOmega1 ms ms − %470 KOmega1 475 KOmega1 ms ms − %820 KOmega1 839 KOmega1 ms ms − % MOmega1 MOmega1 ms ms − % MOmega1 MOmega1 ms ms − % MOmega1 MOmega1 ms ms − %10 MOmega1 MOmega1 ms 141 ms − %20 MOmega1 MOmega1 ms 283 ms − %30 MOmega1 30 MOmega1 ms 425 ms − %40 MOmega1 MOmega1 ms 568 ms − %50 MOmega1 50 MOmega1 ms 712 ms − %500 MOmega1 500 MOmega1 ms ms − %1GOmega1 1GOmega1 177。 1% 14, 24 s s − %10 GOmega1 10GOmega1 177。 5% s s − %Table 2 Measured percent error vs. Rsensfor the second convertertopologyRsensValue PeriodNominal Measured Theoretical Measured Error (%)56 KOmega1 KOmega1 ms ms + %82 KOmega1 83 KOmega1 ms ms + %180 KOmega1 KOmega1 ms ms %220 KOmega1 216 KOmega1 ms ms − %680 KOmega1 690 KOmega1 ms 60 ms − % MOmega1 MOmega1 ms ms − %10 MOmega1 MOmega1 ms 870 ms − %20 MOmega1 MOmega1 s s − %30 MOmega1 MOmega1 s s − %40 MOmega1 MOmega1 s s − %50 MOmega1 MOmega1 s s − %100 MOmega1 MOmega1 s %500 MOmega1 500 MOmega1 s s %1GOmega1 1GOmega1 177。 1% 87 s s %SpringerAnalog Integr Circ Sig Process (2020) 47:293–301 297Fig. 5 (a) Solution with inverting amplifier and buffers。 (b) Solution with non inverting amplifier and without buffersFig. 6 “First convertertopology”, Fabricated prototypeboard (left) and Period Vs RSENSmeasured results (right)Fig. 7 “Second convertertopology”, Fabricated prototypeboard (left) and Period Vs RSENSmeasured results (right)Q1Q14 Q15Q13Q12Q11Q10Q9Q8Q7Q6Q5Q4Q3Q2Q16Q17 Q18Vref OUTIn In+IbiasVddOUT1Fig. 8 Operational Transconductance Amplifier at transistor levelsystem has not been considered because it needs of a currentgenerator which has to be very much stable, especially withtemperature, insensible to load variations and has to knowexactly the current injected into the heater. The circuit deFig. 9 AC response of the proposed amplifierlivers a constant power that is independent of the variationin the heater resistor Rheater. The designed power generatorscheme (heater circuit), a modified version of that presentedSpringer298 Analog Integr Circ Sig Process (2020) 47:293–301Fig. 10 Converters chip photo (yellow circled)in [16], is shown in Fig. 12. The cascaded stages providebetter powersupply rejection and reduced channel lengthmodulation effects while maintaining the same frequencyresponse. Heater and pare resistances have been connected to ground, so to be insensitive to supply variations.In fact, the previous solution, shown in [16], carefully simulated, suffers of Vsupplydrift which prevents to achieve thebest performance in terms of Rsensmea。