基于tidm642的视频采集与显示(编辑修改稿)内容摘要:

d depth Transfer linking and chaining 2D transfer DM642 Key Peripherals • Three configurable video ports • One 10/100 Mb/s Ether MAC • One multichannel buffered audio serial port (McASP) • One interintegrated circuit(I2C) Bus module • One 66MHz peripheral ponent interface (PCI) • One 64 bit glueless external memory interface (EMIF) • Two multichannel buffered serial ports (McBSPs) • Three 32bit generalpurpose timers • One userconfigurable 16bit or 32bit hostport interface(HPI16/HPI32) Driver Basics • Separate drivers for capture amp。 display • Only support frame based operation • Uses EDMA to move data between video port FIFO and DSP memory • EDMA link is enabled to automate the transfer no CPU intervention • EDMA transfer pletion interrupts are used to synchronize with the application Video Port Modes • Video Capture - Dualchannel capable - 8/10bit ITU- R mode - 16/20bit Y/C mode - 8/16/20bit raw mode - scaling amp。 chroma resampling(硬件上可实现 ) • Video Display - same as capture DM642 Video Port Use EDMA Linking for Automated Transfer (Capture)??? Y VP FIFO SRC Y EDMA Channels DST Y SRC Y DST Y EDMA Reload Channels Frame1 Frame2 Driver Architecture • Adopted a twolevel device driver model • Top level – Class Driver , 2 layers - FVID Wrapper - GIO Class Driver • Bottom level – Minidriver, 2 layers - IOM interface: Generic EDMA data mover - EDC interface: External Device Control Module Driver Block Diagram Application/Framework GIO Class Driver Video Port/EDMA Video Codecs Encoder/Decoder Specific Part of MiniDriver Chip Support Library (CSL) Class Driver Mini Driver Device Driver FVID Class Driver Wrapper Generic Video Port – EDMA Data Mover Class Driver Architecture • GIO Generic class。
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