instructionclassificationandaddressingmode(编辑修改稿)

instructionclassificationandaddressingmode(编辑修改稿)内容摘要：

for reading data. However, because EU and BIU can work synchronously, the time consumed in immediate data reading can be ignored in some situations. Memory Addressing When operation data is in memory, the addressing mode is memory addressing. Bus operation is needed in this addressing mode, and memory Addressing must be executed in execution cycle of instruction. Then, memory addressing is less effective than register or immediate addressing. Memory Addressing Memory logic address is posed of segment base value and offset (effective address). There are five different memory addressing modes, and they have different offset (EA) posing. Components of EA There are three different ponents which can be bined to EA. DISP (Disparity, 位移量 ): EA ponents provided by machine instruction Base Component (基址分量 ): Provided by BX or BP register Index Component (变址分量 ): Provided by SI or DI register Memory Addressing Different bination mode of these three ponents forms different memory addressing. 1) Direct Addressing (直接寻址 ) 2) Register Indirect Addressing (寄存器间接寻址 ) 3) Based Addressing (基址寻址 ) 4) Indexed Addressing (变址寻址 ) 5) Based Indexed Addressing (基址变址寻址 ) 1) Direct Addressing If EA is posed of DISP only, it is direct addressing. EA = DISP DISP may be data form or symbol form in assembler language. 1) Direct Addressing Example: MOV BX, [1000H]。 implied DS for segment information MOV BX, DS:[1000H] MOV BX, ES:[0100H] 1) Direct Addressing Example: MOV BX, VAR1。 VAR1 is a symbol disparity. MOV AL, DA1+3。 DA1 is a symbol disparity. Symbol disparity will be replaced as data form by assembler (汇编程序 ). 1) Direct Addressing False usage。