bsen61508-7-20xxfunctionalsafetyofelectricalelectronicprogrammableelectronicsafety-relatedsys

bsen61508-7-20xxfunctionalsafetyofelectricalelectronicprogrammableelectronicsafety-relatedsys内容摘要：

.................................................... 16 Dynamic principles ................................................................................................ 17 Standard test access port and boundaryscan architecture .................................. 17 Failsafe hardware ....................................................................................... ......... 17 Monitored redundancy ......................................................................................... . 18 Electrical/electronic ponents with automatic check ......................................... 18 Analogue signal monitoring .................................................................................. . 18 Derating ............................................................................................................... 19 Processing units ........................................................................................................... ..... 19 Selftest by software: limited number of patterns (onechannel)............................ 19 Selftest by software: walking bit (onechannel) .................................................... 19 Selftest supported by hardware (onechannel) .................................................... 19 Coded processing (onechannel) .......................................................................... 20 Reciprocal parison by software ...................................................................... 20 Invariable memory ranges ................................................................................................. 20 Wordsaving multibit redundancy (for example ROM monitoring with a modified Hamming code) .................................................................................. . 20 Modified checksum .............................................................................................. . 21 Signature of one word (8bit)................................................................................ . 21 Signature of a double word (16bit) ....................................................................... 21 Block replication (for example double ROM with hardware or software parison) ............................................................................................ 22 Variable memory ranges ................................................................................................... 22 RAM test checkerboard or march..................................................................... 22 RAM test walkpath.............................................................................................. 23 RAM test galpat or transparent galpat.............................................................. 23 RAM test Abraham ............................................................................................. 24 Onebit redundancy (for example RAM monitoring with a parity bit)...................... 2 4 RAM monitoring with a modified Hamming code, or detection of data failures with errordetectioncorrection codes (EDC) ......................................................... 24 Double RAM with hardware or software parison and read/write test .............. 25 Page 5 EN 61508−7:2020 Licensed Copy: Institute Of Technology Tallaght, Institute of Technology, Mon Jun 11 16:16:51 GMT+00:00 2007, Uncontrolled Copy, (c) BSI Clause Page I/Ounits and interfaces (external munication) ............................................................ 25 Test pattern........................................................................................................... 25 Code protection..................................................................................................... 2 5 Multichannel parallel output ................................................................................ . 26 Monitored outputs ................................................................................................. 26 Input parison/voting ........................................................................................ 27 Data paths (internal munication) ................................................................................. 27 Onebit hardware redundancy .............................................................................. . 27 Multibit hardware redundancy .............................................................................. 27 Complete hardware redundancy ........................................................................... 27 Inspection using test patterns ............................................................................... 28 Transmission redundancy .................................................................................... . 28 Information redundancy ....................................................................................... . 28 Power supply............................................................................................................... ...... 28 Overvoltage protection with safety shutoff ........................................................... 28 Voltage control (secondary) ................................................................................. . 29 Powerdown with safety shutoff ........................................................................... 29 Temporal and logical program sequence monitoring ......................................................... 29 Watchdog with separate time base without timewindow ..................................... 29 Watchdog with separate time base and timewindow........................................... 30 Logical monitoring of program sequence .........................。