dsp56800efamily

dsp56800efamily内容摘要：

rammable Chip Select Logic  Glueless interface to ROM, EPROM, Flash EPROM and SRAM etc.  16bit data bus  21bit address bus (24bit max for 56800E core)  Support devices with access times up to 250ns. 5685x External Memory Interface Ira Fulton School of Engineering Electrical Department EEE408 – Real Time DSP Tuesday, November 17, 2020 Introduction to 5685x Series HOST INTERFACE BUS DSP INTERNAL BUS Interrupt Vector Register Receive High Register (RXH) Command Vector Register Interface Control Register Interface Status Register Receive Low Register (RXL) Transmit High Register (TXH) Transmit Low Register (TXL) Host Status Register Host Control Register Host Transmit Register (HTX) Host Receive Register (HRX) Address Decode 8 8 8 8 16 16 HD[0:7] HA[0:2] HACK/HRRQ HREQ/HTRQ HRW/HRDS HDS/HWRS HCS Host Interface (1/2) Ira Fulton School of Engineering Electrical Department EEE408 – Real Time DSP Tuesday, November 17, 2020 Introduction to 5685x Series DSP Side.  Registers are directly mapped into four X data memory locations.  16bit data wide  Transfer mode  DSP to host  Host to DSP  Host Command  Handshaking protocol  Software Polled  Interrupt driven  DMA accesses  Instructions  Memorymapped registers allow the standard MOVE instruction to be used  Bit manipulation instructions simplify I/O service routines  Bytewide, fullduplex, double buffered, parallel port  Operate asynchronously to the DSP core clock  Data transfers are manageable  The host side registers are accessible to the external host processor  The DSP side registers are accessible to the DSP core Host Side.  16 signal pins are provided to support nonmultiplexed data bus  8bit data wide  Transfer mode  DSP to Host: 8bit or 16bit  Host to DSP: 8bit or 16 bit  Host Command  Handshaking protocols  Software Polled  Interrupt driven  DMA accesses  Separate interrupt lines for each interrupt source  Special host mands force the host mand associated DSP core interrupts under host processor control, which are useful for:  Realtime production diagnostics  Debugging window for program development Host Interface (2/2) Ira Fulton School of Engineering Electrical Department EEE408 – Real Time DSP Tuesday, November 17, 2020 Introduction to 5685x Series  Independent (asynchronous) or shared (synchronous) transmit and receive sections with separate or shared internal/external clocks and frame syncs  Normal mode operation using frame sync  Network mode operation allowing multiple devices to share the port with as many as thirtytwo time slots  Network mode enhancements Time slot mas。