module9memorymanagement内容摘要:
job in memory while it is involved in I/O.( 当 I/O的时候,把工作锁定在内存中。 ) Do I/O only into OS buffers.( 只对操作系统的缓冲区进行 I/O。 ) Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts Paging • Logical address space of a process can be noncontiguous。 process is allocated physical memory whenever the latter is available.( 进程的逻辑地址空间可能是不连续的,如果有可用的物理内存,它将分给进程。 ) • Divide physical memory into fixedsized blocks called frames (size is power of 2, between 512 bytes and 8192 bytes).( 把物理内存分成大小固定的块。 ) • Divide logical memory into blocks of same size called pages.( 把逻辑内存也分位固定大小的块,叫做页。 ) • Keep track of all free frames.( 保留一个页的记录。 ) • To run a program of size n pages, need to find n free frames and load program.( 运行一个有 N页大小的程序,需要找到 N个空的页框读入程序。 ) • Set up a page table to translate logical to physical addresses. ( 建立一个页表,把逻辑地址转换为物理地址。 ) • Internal fragmentation.( 内碎片。 ) Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts Address Translation Scheme • Address generated by CPU is divided into( CPU产生的地址被分为) : – Page number (p) ( 页号) – used as an index into a page table which contains base address of each page in physical memory.( 它包含每个页在物理内存中的基址,用来作为页表的索引。 ) – Page offset (d) ( 偏移) – bined with base address to define the physical memory address that is sent to the memory unit.( 同基址相结合,用来确定送入内存设备的物理内存地址。 ) Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts Address Translation Architecture Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts Paging Example Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts Implementation of Page Table • Page table is kept in main memory.( 主存中的页表) • Pagetable base register (PTBR) points to the page table.( 页表基址寄存器指向页表) • Pagetable length register (PRLR) indicates size of the page table.( 页表限长寄存器表明页表的长度) • In this scheme every data/instruction access requires two memory accesses. One for the page table and one for the data/instruction.( 在这个机制中,每一次的数据 /指令存取需要两次内存存取,一次是存取页表,一次是存取数据) • The two memory access problem can be solved by the use of a special fastlookup hardware cache called associative registers or translation lookaside buffers (TLBs). (通过一个联想寄存器,可以解决两次存取的问题) Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts Associative Register • Associative registers – parallel search ( 联想寄存器 —并行查找) Address translation (A180。 , A180。 180。 )( 地址转换) – If A180。 is in associative register, get frame out. ( 如果 A’在联想寄存器中,把页框 取出来。 ) – Otherwise get frame from page table in memory.( 否则从内存中的页表中取出页框。 ) Page Frame Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts Effective Access Time • Associative Lookup = time unit( 联想寄存器的查找需要时间 ) • Assume memory cycle time is 1 microsecond( 假设内存一次存取要 1微秒) • Hit ration – percentage of times that a page number is found in the associative registers。 ration related to number of associative registers.( 命中率 —在联想寄存器中找到页号的比率,比率与联想寄存器的大小有关。 ) • Hit ratio = • Effective Access Time (EAT)( 有效存取时间) EAT = (1 + ) + (2 + )(1 – ) = 2 + – Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts Memory Protection • Memory protection implemented by associating protection bit with each frame.( 内存的保护由与每个页框相连的保护位来执行。 ) • Validinvalid bit attached to each entry in the page table( 有效 无效位附在页表的每个表项中) : – “ valid‖ indicates that the associated page is in the process’ logical address space, and is thus a legal page.( ―有效”表明相关的页在进程的逻辑地址空间,以及是一个合法的页。 ) – “ invalid‖ indicates that the page is not in the process’ logical address space.( ―无效”表明页不在进程的逻辑地址空间中。 ) Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts TwoLevel PageTable Scheme Silberschatz, Galvin, and Gagne 1999 Applied Operating System Concepts TwoLevel Paging Example • A logical address (on 32bit machine with 4K page size) is divided into( 一个逻辑地址被分为) : – a page number consisting of 20 bits.( 一个 20位的页号。 ) – a page offset consisting of 12 bits.( 一个 12位的偏移。 ) • Since the page table is paged, the page number is further divid。module9memorymanagement
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