外文翻译---stc89c52数据手册

外文翻译---stc89c52数据手册内容摘要：

ents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins， they are pulled high by the internal pullups and can be used as inputs. As inputs， Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the STC89C52， as shown in the following table. Port 3 also receives some control signals for Flash programming and verification. RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO， the RESET HIGH out feature is enabled. ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation， ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking desired， ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set， ALE is active only during a MOVX or MOVC instruction. Otherwise， the pin is weakly pulled high. Setting the ALE。