mcs51单片机英文文献及翻译

mcs51单片机英文文献及翻译内容摘要：

ory outside having slice, four ports these may serve as accurate twoway mouth of I/O in mon use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off。 P0 mouth is a two way bus, send the introduction of 8 low addresses and data / export in timesharing The circuit of 8051 onechip puters and four I/O ports is very ingenious in design. Familiar with I/O port logical circuit, not only help to use port correctly and rationally, and will inspire to designing the peripheral logical circuit of onechip puter to some extent. Load ability and interface of port have certain requirement, because output grade, P0 of mouth and P1 end output, P3 of mouth grade different at structure, so, the load ability and interface of its door d emand to have nothing in mon with each other. P0 mouth is different from other mouth, its output grade draws the resistance supremely. When using it as the mouth in mon use, output grade is it leak circuit to turn on, is it urge NMOS draw the resistance on taking to be outer with it while inputting to go out to fail. When being used as introduction, should write1 to a latch first. Every one with P0 mouth can drive 8 Model LS TTL load to export. P1 mouth is an accurate twoway mouth too, used as I/O in mon use. Different from P0 mouth output of circuit its, draw load resistance link with power on inside have. In fact, the resistance is that two effects are in charge of FET and together: One FET is in charge of load, its resistance is regular. Another one can is it lead to work with close at two state, make its President resistance value change approximate 0 or group value heavy two situation very. When it is 0 that the resistance is approximate, can draw the pin to the high level fast。 when resistance value is very large, P1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwards, draw electric current load to offer outwards, draw the resistance on needn39。 t answer and thinking. Here when the port is used as introduction, must write into 1 to the corresponding latch first too, make FET end relatively about 20,000 ohms because of load resistance in scene and because 40,000 ohms, will not exert an influence on the data that are input. The structure of P2 some mouth is similar to P0 mouth, there are MUX switches. Is it similar to mouth partly to urge, but mouth large a conversion controls some than mouth one multifunctional port, mouth getting many than P1 it have 3 doors and 4 buffers. Two parts there, make her besides accurate twoway function with P1 mouth just, can also use the second function of every pin, and door 3 functions one switch in fact, it determines to be to output data of latch to output second signal of function. Act as W=At 1 o39。 clock, o utput Q end signal。 act as Q=At 1 o39。 clock, can output W line signal. At the time of programming, it is that the first function is still the second function but needn39。 t have software that set up P3 mouth in advance .It hardware not inside is the automatic to have two function outputted when CPU carries on SFR and seeks the location to visit to P3 mouth/at not lasting lining, there are inside hardware latch Qs=1. The operation principle of P3 mouth is similar to P1 mouth. Output grade, P3 of mouth, P1 of P1, connect with inside have load resistance of drawing, every one of they can drive 4 Model LS TTL load to output. As while。