外文文献及翻译：基于at89s51单片机的微型土壤湿度检测仪设计

外文文献及翻译：基于at89s51单片机的微型土壤湿度检测仪设计内容摘要：

table for relatively tough in conditions Under the poor conditions of the job. The use of LCD Using micro LCD display device, 1602LCD, its performance point is: working voltage only ~ V。 Very low power consumption (work current Only mA)。 And reliable work。 Small volume (can show 16 x 2 words Operators). Its characters are displayed by internal special displacement function of HD44780 dynamic core slice [4] Quasi ASCII put into their number within department set into reservoir with deposit according to show and editor (DDRAM), inside the ministry accused of line of road will move will word from sheba operators preach send to show, Implement. Monolithic machine and the number of 1602LCD between general P0 into change had to enter line, resistance for P0 mouth R9 R2 ~ the pullup resistors Section 4 The software design of the control of system This recorder controlling software design adopts modular thought. According to the function,w emake the controlling system software devide into two big modules: (1) ADC0832 driver module, to control the collection of voltage signal。 (2) 1602LCD driver module, show soil humidity. This system driver using C Language design, its main program is as follows Main (void) { unsigned int AD_val。 Convert the value after the unsigned int Int, Dec。 The converted the integer part and the decimal part / / storage save A/D / / points don39。 t store in existence change LcdInitiate ()。 / / to be liquid crystal early beginning } 2)the production of clock When the clock points frequency device (after it can have to MHz in turn when the change in A/D clock) turn change when idle is empty, the hold after A state in ADCR is written to the START field immediately START 01 (conversion) or the selected edge appear in choice of signal sampling clock can immediately START. This feature can save power consumption. ADC conversion clock putation formula is as follows FADC=FPCK/（ CLKDIV+1） Type: Fpclk core slice。 when the clock set After CLKDIV points of ADC conversion clock frequency. 3) interrupted. When DONE bits is 1, A/D conversion module to vector interrupt controller (VIC) issued an interrupt request in the VICIntEnable VIC, if Bit8 (A/D conversion interrupts enabled bits) make can, then can produce the interruption. Read ADDR will reset DONE bits. This paper mainly A/D acquisition C language driver section design is as follows: /*********************************** Function: A/D acquisition Entrance parameters: CH_i /*********************************** void AD_Change(unsigned char CH_i) { ADC0R = (1 CH_i) | / / choose channels I carry A/D acquisition ((Fpclk / 1,000, 0001) 8 | / / set convert clock (0 16) (0 19) | / / BURST = 0, software control conversion operations | / / normal A/D acquisition modes (0 27)。 | / / decrease along the startup conversion AD0DR。 DO = / / read take ADC and fruit, and clear except DONE mark bits while (1) . . } Section5 temperature measuring system of Proteus software simulation To ensure system on the hardware and software system, reliable work the Proteus software simulation. The basic process is first draw HaoTu 3 illustrates the simulation Electricity by road after Keil soft thing, Ed into the translation and born of dynamic soft thing ec flooding (files) : LPC2131 loaded. And Proteus software environment The simulation results ( + 3V corresponding full amount 30Kpa) the process design of the software and hardware the results sh。